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LTC1164-7 Low Power, Linear Phase 8th Order Lowpass Filter
FEATURES

DESCRIPTIO
Better Than Bessel Roll-Off fCUTOFF up to 20kHz, Single 5V Supply ISUPPLY = 2.5mA (Typ), Single 5V Supply 75dB THD + Noise with Single 5V Supply Phase and Group Delay Response Fully Tested Transient Response with No Ringing Wide Dynamic Range No External Components Needed Available in 14-Lead N and 16-Lead SW Packages
The LTC1164-7 is a low power, clock-tunable monolithic 8th order lowpass filter with linear passband phase and flat group delay. The amplitude response approximates a maximally flat passband and exhibits steeper roll-off than an equivalent 8th order Bessel filter. For instance, at twice the cutoff frequency the filter attains 34dB attenuation (vs12dB for Bessel), while at three times the cutoff frequency the filter attains 68dB attenuation (vs 30dB for Bessel). The cutoff frequency of the LTC1164-7 is tuned via an external TTL or CMOS clock. Low power is achieved without sacrificing dynamic range. With single 5V supply, the S/N + THD is up to 75dB. Optimum 91dB S/N is obtained with 7.5V supplies. The clock-to-cutoff frequency ratio of the LTC1164-7 can be set to 50:1 (Pin 10 to V +) or 100:1 (Pin 10 to V -). When the filter operates at the clock-to-cutoff frequency ratio of 50:1, the input is double-sampled to lower the risk of aliasing. The LTC1164-7 is pin-compatible with the LTC1064-X series and LTC1264-7.
APPLICATIO S

Data Communication Filters Time Delay Networks Phase Matched Filters
, LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATIO
1 VIN 2 3 5V 4 5 6 7 LTC1164-7 14 13 12 11 10 9 8
10kHz Linear Phase Lowpass Filter
0
-5V CLK = 500kHz 5V VOUT
-10 -20 DELAY
GAIN (dB)
-30 -40 -50 -60
NOTE: THE POWER SUPPLIES SHOULD BE BYPASSED BY A 0.1F CAPACITOR CLOSE TO THE PACKAGE AND ANY PRINTED CIRCUIT BOARD ASSEMBLY SHOULD MAINTAIN A DISTANCE OF AT LEAST 0.2 INCHES BETWEEN ANY OUTPUT OR INPUT PIN AND THE fCLK LINE. 1164-7 TA01
-70 -80 1 10 FREQUENCY (kHz)
U
Frequency Response
GAIN 150 140 130 120 110 100 90 80 70 100
1164-7 TA02
U
U
DELAY (s)
11647fb
1
LTC1164-7 ABSOLUTE AXI U
+ -
RATI GS (Note 1)
Operating Temperature Range LTC1164-7C ...................................... - 40C to 85C LTC1164-7M ................................... - 55C to 125C Lead Temperature (Soldering, 10 sec)................. 300C
Total Supply Voltage (V to V ) ............................. 16V Power Dissipation ............................................. 400mW Burn-In Voltage ...................................................... 16V Voltage at Any Input ..... (V - - 0.3V) VIN (V + + 0.3V) Storage Temperature Range ................ - 65C to 150C
PACKAGE/ORDER I FOR ATIO
TOP VIEW
NC VIN GND V
+
1 2 3 4 5 6 7
14 CONNECT 2 13 NC 12 V-
ORDER PART NUMBER
LTC1164-7CN
11 fCLK 10 50/100 9 8 VOUT NC
GND LP6 CONNECT 1
N PACKAGE 14-LEAD PLASTIC DIP
J PACKAGE 14-LEAD CERAMIC DIP TJMAX = 150C, JA = 65C/W (J) TJMAX = 150C, JA = 65C/W (J) TJMAX = 110C, JA = 65C/W (N)
OBSOLETE PACKAGE
Consider the N Package as an Alternate Source
LTC1164-7CJ LTC1164-7MJ
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges.
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 7.5V, RL = 10k, f CUTOFF = 8kHz or 4kHz, fCLK = 400kHz, TTL or CMOS level and all gain measurements are referenced to passband gain, unless otherwise specified. (Maximum clock rise or fall time 1s.) The filter cutoff frequency is abbreviated as fCUTOFF or fC.
PARAMETER Passband Gain Gain at 0.50 fCUTOFF Gain at 0.75 fCUTOFF Gain at fCUTOFF Gain at 2.0 fCUTOFF Gain with fCLK = 20kHz Gain with fCLK = 400kHz, VS = 2.375V Phase Factor (F ) Phase = 180 - F (f/fC) (Note 2) CONDITIONS 0.1Hz f 0.25 fCUTOFF fTEST = 2kHz, (fCLK / fC) = 50:1 fTEST = 4kHz, (fCLK / fC) = 50:1 fTEST = 2kHz, (fCLK / fC) = 100:1 fTEST = 6kHz, (fCLK / fC) = 50:1 fTEST = 8kHz, (fCLK / fC) = 50:1 fTEST = 4kHz, (fCLK / fC) = 100:1 fTEST = 16kHz, (fCLK / fC) = 50:1 fTEST = 8kHz, (fCLK / fC) = 100:1 fTEST = 200Hz, (fCLK / fC) = 100:1 fTEST = 4kHz, (fCLK / fC) = 50:1 fTEST = 8kHz, (fCLK / fC) = 50:1 0.1Hz f fCUTOFF (fCLK / fC) = 50:1 (fCLK / fC) = 100:1 (fCLK / fC) = 50:1 (fCLK / fC) = 100:1 (fCLK / fC) = 50:1 (fCLK / fC) = 100:1 (fCLK / fC) = 50:1 (fCLK / fC) = 100:1 MIN

ELECTRICAL CHARACTERISTICS
Phase Nonlinearity (Note 2)
2
U
U
W
WW
U
W
TOP VIEW
NC 1 VIN 2 GND 3 V+
16 CONNECT 2 15 NC 14 V - 13 NC 12 fCLK 11 50/100 10 NC 9
VOUT
ORDER PART NUMBER LTC1164-7CSW
4
GND 5 NC 6 LP6 7 CONNECT 1 8
SW PACKAGE 16-LEAD PLASTIC SO (WIDE) TJMAX = 110C, JA = 85C/W
TYP - 0.10 - 0.20 - 0.65 -1.1 - 3.4 - 5.2 - 34 - 34 - 5.2 - 0.2 - 3.4 435 2 428 2
MAX 0.30 0.30 0.15 0.1 -1.9 - 2.5 - 30 - 30 - 2.5 0.2 - 2.5
UNITS dB dB dB dB dB dB dB dB dB dB dB Deg Deg Deg Deg % % % %
11647fb
- 0.50 - 0.50 - 0.85 - 1.2 - 4.1 - 5.5 - 37 - 38 - 5.7 - 0.50 - 3.75

430 423 1.0 1.0
442 434 2.0 2.5

LTC1164-7
ELECTRICAL CHARACTERISTICS
PARAMETER Group Delay (td) td = (1/360)(f/fC) (Note 3) Group Delay Deviation (Note 3)
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 7.5V, RL = 10k, f CUTOFF = 8kHz or 4kHz, fCLK = 400kHz, TTL or CMOS level and all gain measurements are referenced to passband gain, unless otherwise specified. (Maximum clock rise or fall time 1s.) The filter cutoff frequency is abbreviated as fCUTOFF or fC.
CONDITIONS (fCLK/fC) = 50:1, f f CUTOFF (fCLK/fC) = 100:1, f fCUTOFF (fCLK/fC) = 50:1, f f CUTOFF (fCLK/fC) = 100:1, f fCUTOFF (fCLK/fC) = 50:1, f f CUTOFF (fCLK/fC) = 100:1, f fCUTOFF (fCLK/fC) = 50:1, f f CUTOFF (fCLK/fC) = 100:1, f fCUTOFF (fCLK/fC) = 50:1 (fCLK/fC) = 100:1 VS = Single 5V (Pins 3 and 5 at 2V) VS = 5V VS = 7.5V 50:1, 5V, Input at GND VS = 2.5V VS = 5V VS = 7.5V VS = 2.375V VS = 5V VS = 7.5V 50:1, VS = 5V 100:1, VS = 5V 50:1, VS = 5V 100:1, VS = 5V VS = 2.375V, TA = 25C VS = 5V, TA = 25C VS = 7.5V, TA = 25C Power Supply Range Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Input frequencies, f, are linearly phase shifted through the filter as long as f fC; f C = cutoff frequency. Figure 1 curve shows the typical phase response of an LTC1164-7 operating at f CLK = 400kHz, f C = 8kHz and it closely matches an ideal straight line. The phase shift is described by: phase shift = 180 - F (f/fC); f fC. F is arbitrarily called the "phase factor" expressed in degrees. The phase factor together with the specified deviation from the ideal straight line allows the calculation of the phase at a given frequency. Example: The phase shift at 7kHz of the LTC1164-7 shown in Figure 1 is: phase shift = 180 - 434 (7kHz/10kHz) nonlinearity = -123.8 1% or -123.9 1.24. Note 3: Group delay and group delay deviation are calculated from the measured phase factor and phase deviation specifications. Note 4: The AC swing is typically 11VP-P, 7VP-P, 2.8VP-P for 7.5V, 5V, 2.5V supply respectively. For more information refer to the THD + Noise vs Input graphs.
180 90 0 -90
MIN
TYP 151.0 1 297.2 1
MAX

149.3 293.8 1.0 1.0
153.5 301.4

2.0 2.5
Input Frequency Range (Table 9) Maximum fCLK
Clock Feedthrough (f = fCLK) Wideband Noise (1Hz f < fCLK) Input Impedance Output DC Voltage Swing (Note 4)

35 1.25 3.70 5.40
Output DC Offset Output DC Offset TempCo Power Supply Current
90
220

7.0
2.375
4.0 4.5 7.0 8.0 11.0 12.5 8
UNITS s s s s % % % % kHz kHz MHz MHz MHz VRMS VRMS VRMS VRMS k V V V mV mV V/C V/C mA mA mA mA mA mA V
fCLK = 500kHz (fCLK /fC) = 50:1
PHASE (DEG)
-180 -270 -360 0 1 2 34567 FREQUENCY (kHz) 8 9 10
1164-7 F01
Figure 1. Phase Response in the Passband (Note 1)
11647fb
3
LTC1164-7
TYPICAL PERFOR A CE CHARACTERISTICS
Gain vs Frequency
10 0 -10 -20
PHASE FACTOR
GAIN (dB)
-40 -50 -60 -70 -80 -90 -100 -110 0.1 VS = 5V fCLK = 500kHz TA = 25C
100:1
50:1
PHASE FACTOR
-30
1 10 FREQUENCY (kHz)
Phase Factor vs fCLK (Min and Max Representative Units)
438 VS = 5V (fCLK /fC) = 50:1 TA = 25C
PHASE FACTOR
437
PHASE FACTOR
GAIN (dB)
436
435
434
433 0.25
0.5 fCLK (MHz)
0.75
Passband Gain and Phase
5 GAIN 180 5
0
GAIN (dB)
GAIN (dB)
-5 PHASE VS = 5V fCLK = 50kHz fC = 1kHz (fCLK /fC) = 50:1 200 800 400 600 FREQUENCY (Hz) 1000
1164-7 G07
-10
-15
-20
4
UW
1264-7 G01
Phase Factor vs fCLK (Typical Unit)
438 VS = 5V (fCLK /fC) = 50:1
436 435 434
Phase Factor vs fCLK (Typical Unit)
VS = 5V (fCLK /fC) = 100:1
437 70C 25C 436 0C
433 432 431 430 429 428 427 0C 25C 70C
100
435 0.25
0.5 fCLK (MHz)
0.75
1.0
1164-7 G02
426 0.25
0.5 fCLK (MHz)
0.75
1.0
1164-7 G03
Phase Factor vs fCLK (Min and Max Representative Units)
438 VS = SINGLE 5V PINS 3, 5 AT 2V (fCLK /fC) = 50:1 TA = 25C
Gain vs Frequency
10 0 -10 -20 -30 -40 -50 -60 VS = SINGLE 5V fCLK = 1MHz fC = 10kHz (fCLK /fC) = 50:1 TA = 25C 1 10 FREQUENCY (kHz) 100
1164-7 G06
437
436
435
434
-70 -80
1.0
1164-7 G04
433 0.25
0.5 fCLK (MHz)
0.75
-90
1.0
1164-7 G05
Passband Gain and Phase
180
90
PHASE (DEG)
0
GAIN
90
PHASE (DEG)
0
-5 PHASE VS = 5V fCLK = 100kHz fC = 1kHz (fCLK /fC) = 100:1 200 800 400 600 FREQUENCY (Hz) 1000
1164-7 G08
0
-90
-10
-90
-180
-15
-180
-270
-20
-270
11647fb
LTC1164-7
TYPICAL PERFOR A CE CHARACTERISTICS
Passband Gain vs Frequency and fCLK
5 4 3 2
GAIN (dB)
VS = 5V (fCLK /fC) = 50:1 TA = 25C
A. fCLK = 250kHz B. fCLK = 500kHz C. fCLK = 750kHz D. fCLK = 1000kHz
GAIN (dB)
0 -1 -2 -3 -4 -5 1 10 FREQUENCY (kHz) 100
1164-7 G09
0 -1 -2
GAIN (dB)
1
A
B
CD
Passband Gain vs Frequency and fCLK
5 4 3 2 VS = SINGLE 5V (fCLK /fC) = 50:1 TA = 85C A. fCLK = 250kHz B. fCLK = 500kHz C. fCLK = 750kHz D. fCLK = 1000kHz
250
DELAY (s)
DELAY (s)
GAIN (dB)
1 0 -1 -2 -3 -4 -5 1 10 FREQUENCY (kHz) 100
1164-7 G12
A
B
CD
THD + Noise vs Frequency
- 40 -45 - 50 VS = 7.5V VIN = 2VRMS fCLK = 500kHz (fCLK /fC) = 50:1 (5 REPRESENTATIVE UNITS) - 40 -45 - 50
THD + NOISE (dB)
THD + NOISE (dB)
- 60 -65 - 70 -75 -80 -85 -90 1
- 60 -65 - 70 -75 -80 -85 -90
THD + NOISE (dB)
- 55
5 FREQUENCY (kHz)
UW
1164-7 G15
Passband Gain vs Frequency and fCLK
5 4 3 2 1 VS = 5V (fCLK /fC) = 50:1 TA = 85C 5 A. fCLK = 250kHz B. fCLK = 500kHz C. fCLK = 750kHz D. fCLK = 1000kHz 4 3 2 1 0 -1 -2
Passband Gain vs Frequency and fCLK
VS = 5V (fCLK /fC) = 100:1 TA = 25C A. fCLK = 250kHz B. fCLK = 500kHz C. fCLK = 750kHz D. fCLK = 1000kHz
-3 -4 -5 1
A
B
C
D
-3 -4 -5
A
BCD
10 FREQUENCY (kHz)
100
1164-7 G10
1
10 FREQUENCY (kHz)
100
1164-7 G11
Delay vs Frequency and fCLK
500
A 200 VS = 5V (fCLK /fC) = 50:1 TA = 25C A. fCLK = 250kHz B. fCLK = 500kHz C. fCLK = 750kHz D. fCLK = 1000kHz
Delay vs Frequency and fCLK
450 400 350 300 250 200 150 100 50 B C D A VS = 5V (fCLK /fC) = 100:1 TA = 25C A. fCLK = 250kHz B. fCLK = 500kHz C. fCLK = 750kHz D. fCLK = 1000kHz
150 B 100 C D 50
0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (kHz) 22
0 1 2 3 45 678 FREQUENCY (kHz) 9 10 11
1264-7 G13
1264-7 G14
THD + Noise vs Frequency
- 40 VS = 5V VIN = 1VRMS fCLK = 500kHz (fCLK /fC) = 50:1 (5 REPRESENTATIVE UNITS) -45 - 50 - 55 - 60 -65 - 70 -75 -80 -85 1 5 FREQUENCY (kHz) 10
1164-7 G16
THD + Noise vs Frequency
VS = 7.5V VIN = 2VRMS fCLK = 500kHz (fCLK /fC) = 100:1 (5 REPRESENTATIVE UNITS)
- 55
10
-90
1
2 3 FREQUENCY (kHz)
4
5
1164-7 G17
11647fb
5
LTC1164-7
TYPICAL PERFOR A CE CHARACTERISTICS
THD + Noise vs Frequency
- 40 -45 - 50
THD + NOISE (dB)
THD + NOISE (dB)
- 60 -65 - 70 -75 -80 -85 -90 1
- 60 -65 - 70 -75 -80 -85 -90
THD + NOISE (dB)
- 55
VS = 5V VIN = 1VRMS fCLK = 500kHz (fCLK /fC) = 100:1 (5 REPRESENTATIVE UNITS)
2 3 FREQUENCY (kHz)
THD + Noise vs Frequency
- 40 -45 - 50
THD + NOISE (dB)
THD + NOISE (dB)
- 60 -65 -70 -75 -80 -85 -90 1
-60 -65 -70 -75 -80 -85
THD + NOISE (dB)
- 55
VS = SINGLE 5V VIN = 0.5VRMS fCLK = 500kHz (fCLK /fC) = 100:1 AGND = 2.5V (5 REPRESENTATIVE UNITS)
2 3 FREQUENCY (kHz)
THD + Noise vs Input
-40 -45 -50
THD + NOISE (dB)
PHASE DIFFERENCE (DEG)
-55 -60 -65 -70 -75 -80 -85 -90 0.1
VS = SINGLE 5V fCLK = 500kHz fIN = 1kHz (fCLK /fC) = 100:1
3
CURRENT (mA)
A. AGND = 2V B. AGND = 2.5V 1 INPUT (VRMS)
1164-7 G24
6
UW
4
1164-7 G18
THD + Noise vs Frequency
- 40 -45 - 50 - 55 VS = SINGLE 5V VIN = 0.5VRMS fCLK = 500kHz (fCLK /fC) = 50:1 AGND = 2V (5 REPRESENTATIVE UNITS) - 40 -45 - 50 - 55 - 60 -65 - 70 -75 -80 -85 1 5 FREQUENCY (kHz) 10
1164-7 G19
THD + Noise vs Frequency
VS = SINGLE 5V VIN = 0.5VRMS fCLK = 500kHz (fCLK /fC)= 50:1 AGND = 2.5V (5 REPRESENTATIVE UNITS)
-90 1 5 FREQUENCY (kHz) 10
1164-7 G20
5
THD + Noise vs Input
-40 -45 -50 -55 fIN = 1kHz fCLK = 500kHz (fCLK /fC) = 50:1 A. VS = 5V B. VS = 7.5V A B -55 -60 -65 -70 -75 -80 -85 1 INPUT (VRMS)
1164-7 G21
1164-7 G22
THD + Noise vs Input
-40 -45 -50 VS = SINGLE 5V fCLK = 500kHz fIN = 1kHz (fCLK /fC) = 50:1 B A
A. AGND = 2V B. AGND = 2.5V 1 INPUT (VRMS)
1164-7 G23
4
5
-90 0.1
5
-90 0.1
2
Phase Matching vs Frequency
5
B A
Power Supply Current vs Power Supply Voltage
12 11 10 9 8 7 6 5 4 3 2 1 0 25C 125C -55C
4
PHASE DIFFERENCE BETWEEN ANY TWO UNITS (SAMPLE OF 50 REPRESENTATIVE UNITS) VS 5V fCLK 500kHz (fCLK /fC) = 50:1 OR 100:1 TA = 0C TO 70C
2
1
2
0
0
0.2 0.6 0.8 0.4 FREQUENCY (fCUTOFF /FREQUENCY)
1.0
0
1
34 2 5678 POWER SUPPLY (V + OR V -)
9
10
1164-7 G25
1164-7 G26
11647fb
LTC1164-7
TYPICAL PERFOR A CE CHARACTERISTICS
Table 1. Passband Gain and Phase VS = 7.5V, Ratio = 50:1, TA = 25C
FREQUENCY (kHz) fCLK = 250kHz (Typical Unit) 0.000 1.250 2.500 3.750 5.000 fCLK = 500kHz (Typical Unit) 0.000 2.500 5.000 7.500 10.000 fCLK = 750kHz (Typical Unit) 0.000 3.750 7.500 11.250 15.000 fCLK = 1MHz (Typical Unit) 0.000 5.000 10.000 15.000 20.000 GAIN (dB) - 0.085 - 0.085 - 0.261 - 1.092 - 3.647 - 0.091 - 0.091 - 0.251 - 1.028 - 3.488 - 0.106 - 0.106 - 0.264 - 0.943 - 3.206 - 0.131 - 0.131 - 0.291 - 0.853 - 2.864 PHASE (DEG) 180.00 71.51 - 37.31 - 146.38 - 255.45 180.00 71.36 - 37.57 -146.78 - 256.16 180.00 71.26 - 37.65 - 146.88 - 256.58 180.00 71.11 - 37.71 - 146.87 - 256.81
Table 3. Passband Gain and Phase VS = 5V, Ratio = 50:1, TA = 25C
FREQUENCY (kHz) fCLK = 250kHz (Typical Unit) 0.000 1.250 2.500 3.750 5.000 fCLK = 500kHz (Typical Unit) 0.000 2.500 5.000 7.500 10.000 fCLK = 750kHz (Typical Unit) 0.000 3.750 7.500 11.250 15.000 fCLK = 1MHz (Typical Unit) 0.000 5.000 10.000 15.000 20.000 GAIN (dB) - 0.071 - 0.071 - 0.243 - 1.068 - 3.609 - 0.081 - 0.081 - 0.236 - 0.981 - 3.371 - 0.105 - 0.105 - 0.261 - 0.883 - 3.008 - 0.134 - 0.134 - 0.292 - 0.771 - 2.571 PHASE (DEG) 180.00 71.48 - 37.29 - 146.34 - 255.40 180.00 71.35 - 37.52 -146.71 - 256.13 180.00 71.26 - 37.62 - 146.80 - 256.57 180.00 70.99 - 37.75 - 146.83 - 256.88
UW
Table 2. Passband Gain and Phase VS = 7.5V, Ratio = 100:1, TA = 25C
FREQUENCY (kHz) fCLK = 250kHz (Typical Unit) 0.000 0.625 1.250 1.875 2.500 fCLK = 500kHz (Typical Unit) 0.000 1.250 2.500 3.750 5.000 fCLK = 750kHz (Typical Unit) 0.000 1.875 3.750 5.625 7.500 fCLK = 1MHz (Typical Unit) 0.000 2.500 5.000 7.500 10.000 GAIN (dB) - 0.201 - 0.201 - 0.727 - 2.075 - 5.205 - 0.176 - 0.176 - 0.645 - 1.945 - 5.032 - 0.161 - 0.161 - 0.574 - 1.789 - 4.779 - 0.157 - 0.157 - 0.538 - 1.666 - 4.527 PHASE (DEG) 180.00 71.39 - 36.79 - 143.66 - 247.79 180.00 71.34 - 36.88 - 143.93 - 248.52 180.00 71.32 - 37.04 - 144.45 - 249.82 180.00 71.23 - 37.28 - 145.02 - 251.13
Table 4. Passband Gain and Phase VS = 5V, Ratio = 100:1, TA = 25C
FREQUENCY (kHz) fCLK = 250kHz (Typical Unit) 0.000 0.625 1.250 1.875 2.500 fCLK = 500kHz (Typical Unit) 0.000 1.250 2.500 3.750 5.000 fCLK = 750kHz (Typical Unit) 0.000 1.875 3.750 5.625 7.500 fCLK = 1MHz (Typical Unit) 0.000 2.500 5.000 7.500 10.000 GAIN (dB) - 0.189 - 0.189 - 0.707 - 2.048 - 5.711 - 0.159 - 0.159 - 0.603 - 1.872 - 4.926 - 0.149 - 0.149 - 0.536 - 1.704 - 4.621 - 0.151 - 0.151 - 0.511 - 1.581 - 4.336 PHASE (DEG) 180.00 71.39 - 36.75 - 143.60 - 247.74 180.00 71.35 - 36.85 - 144.00 - 248.80 180.00 71.28 - 37.13 - 144.72 - 250.48 180.00 71.10 - 37.52 - 145.45 - 252.01
11647fb
7
LTC1164-7
TYPICAL PERFOR A CE CHARACTERISTICS
Table 5. Passband Gain and Phase VS = Single 5V, Ratio = 50:1, TA = 25C
FREQUENCY (kHz) fCLK = 250kHz (Typical Unit) 0.000 1.250 2.500 3.750 5.000 fCLK = 500kHz (Typical Unit) 0.000 2.500 5.000 7.500 10.000 fCLK = 750kHz (Typical Unit) 0.000 3.750 7.500 11.250 15.000 fCLK = 1MHz (Typical Unit) 0.000 5.000 10.000 15.000 20.000 GAIN (dB) - 0.085 - 0.085 - 0.252 - 1.056 - 3.562 - 0.101 - 0.101 - 0.251 - 0.947 - 3.252 - 0.133 - 0.133 - 0.291 - 0.826 - 2.789 - 0.162 - 0.162 - 0.307 - 0.647 - 2.201 PHASE (DEG) 180.00 71.54 - 37.15 - 146.12 - 255.22 180.00 71.39 - 37.38 -146.44 - 256.02 180.00 71.16 - 37.56 - 146.55 - 256.52 180.00 70.89 - 37.78 - 146.67 - 257.06
8
UW
Table 6. Passband Gain and Phase VS = Single 5V, Ratio = 100:1, TA = 25C
FREQUENCY (kHz) fCLK = 250kHz (Typical Unit) 0.000 0.625 1.250 1.875 2.500 fCLK = 500kHz (Typical Unit) 0.000 1.250 2.500 3.750 5.000 fCLK = 750kHz (Typical Unit) 0.000 1.875 3.750 5.625 7.500 fCLK = 1MHz (Typical Unit) 0.000 2.500 5.000 7.500 10.000 GAIN (dB) - 0.283 - 0.283 - 0.799 - 2.143 - 5.271 - 0.252 - 0.252 - 0.676 - 1.917 - 4.936 - 0.231 - 0.231 - 0.603 - 1.704 - 4.535 - 0.212 - 0.212 - 0.532 - 1.497 - 4.115 PHASE (DEG) 180.00 71.35 - 37.01 - 143.96 - 248.03 180.00 71.28 - 37.16 - 144.46 - 249.40 180.00 70.94 - 37.72 - 145.55 - 251.81 180.00 70.83 - 38.11 - 146.47 - 253.92
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LTC1164-7 PI FU CTIO S
NC (Pins 1, 8, 13): Pins 1, 8 and 13 are not connected to any internal circuit point on the device and should be preferably tied to analog ground. Filter Input (Pin 2): The input pin is connected internally through a 50k resistor tied to the inverting input of an op amp. Analog GND (Pins 3, 5): The filter performance depends on the quality of the analog signal ground. For either dual or single supply operation, an analog ground plane surrounding the package is recommended. The analog ground plane should be connected to any digital ground at a single point. For dual supply operation, Pins 3 and 5 should be connected to the analog ground plane. For single supply operation, Pins 3 and 5 should be biased at 1/2 supply and should be bypassed to the analog ground plane with at least a 1F capacitor (Figure 3). For single 5V operation at the highest fCLK of 2MHz, Pins 3 and 5 should be biased at 2V. This minimizes passband gain and phase variations. Power Supply (Pins 4, 12): The V + (pin 4) and the V - (Pin 12) should each be bypassed with a 0.1F capacitor to an adequate analog ground. The filter's power supplies should be isolated from other digital or high voltage analog supplies. A low noise linear supply is recommended. Using a switching power supply will lower the signal-tonoise ratio of the filter. The supply during power-up should have a slew rate less than 1V/s. When V + is applied before V - and V - is allowed to go above ground, a signal diode should clamp V - to prevent latch-up. Figures 2 and 3 show typical connections for dual and single supply operation. Filter Output (Pins 6, 9): Pin 6 is an intermediate filter output providing an unspecified 6th order lowpass filter. Pin 6 should not be loaded. Pin 9 is the specified output of the filter; it can typically source/sink 1mA. Driving coaxial cables or resistive loads less than 20k will degrade the total harmonic distortion of the filter. When evaluating the device's distortion an output buffer is required. A noninverting buffer, Figure 4, can be used provided that its input common-mode range is well within the filter's output swing. External Connection (Pins 7, 14): Pins 7 and 14 should be connected together. In a printed circuit board the connection should be done under the IC package through a short trace surrounded by the analog ground plane. Ratio Input (Pin 10): The DC level at this pin determines the ratio of the clock frequency to the cutoff frequency of the filter. Pin 10 at V + gives a 50:1 ratio and pin 10 at V - gives a 100:1 ratio. For single supply operation the ratio is 50:1 when Pin 10 is at V + and 100:1 when Pin 10 is at ground. When Pin 10 is not tied to ground, it should be bypassed to analog ground with a 0.1F capacitor. If the DC level at Pin 10 is switched mechanically or electrically at slew rates greater than 1V/s while the device is operating, a 10k resistor should be connected between pin 10 and the DC source. Clock Input (Pin 11): Any TTL or CMOS clock source with a square-wave output and 50% duty cycle (10%) is an adequate clock source for the device. The power supply for the clock source should not be the filter's power supply. The analog ground for the filter should be connected to clock's ground at a single point only. Table 7 shows the clock's low and high level threshold values for dual or single supply operation. A pulse generator can be used as a clock source provided the high level ON time is greater than 0.5s. Sine waves are not recommended for clock input frequencies less than 100kHz, since excessively slow clock rise or fall times generate internal clock jitter (maximum clock rise or fall time 1s). The clock signal should be routed from the right side of the IC package and perpendicular to it to avoid coupling to any input or output analog signal path. A 1k resistor between clock source and Pin 11 will slow down the rise and fall times of the clock to further reduce charge coupling (Figures 2 and 3).
Table 7. Clock Source High and Low Threshold Levels
POWER SUPPLY Dual Supply = 7.5V Dual Supply = 5V Dual Supply = 2.5V Single Supply = 12V Single Supply = 5V HIGH LEVEL 2.18V 1.45V 0.73V 7.80V 1.45V LOW LEVEL 0.5V 0.5V - 2.0V 6.5V 0.5V
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LTC1164-7 PI FU CTIO S
V- 1 VIN V+ 2 3 4 5 0.1F 6 7 LTC1164-7 14 13 12 11 10 9 8 + GND DIGITAL SUPPLY V+ 1k CLOCK SOURCE 0.1F
Figure 4. Buffer for Filter Output
10
+
1k
-
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VOUT
1164-7 F02
Figure 2. Dual Supply Operation for an fCLK/fCUTOFF = 50:1
1 VIN
+
14 13 12 LTC1164-7 11 10 9 8 + GND DIGITAL SUPPLY 1k CLOCK SOURCE V+
2 3
V
4 0.1F 5 6
10k
7
10k
+
1F VOUT
1164-7 F03
Figure 3. Single Supply Operation for an fCLK/fCUTOFF = 50:1
LT1056
1164-7 F04
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LTC1164-7
APPLICATI
S I FOR ATIO
Clock Feedthrough Clock feedthrough is defined as the RMS value of the clock frequency and its harmonics that are present at the filter's output pin (9). The clock feedthrough is tested with the input pin (2) grounded and it depends on PC board layout and on the value of the power supplies. With proper layout techniques the values of the clock feedthrough are shown in Table 8.
Table 8. Clock Feedthrough
VS Single 5V 5V 7.5V 50:1 70VRMS 100VRMS 120VRMS 100:1 70VRMS 200VRMS 500VRMS
Note: The clock feedthrough at Single 5V is imbedded in the wideband noise of the filter. The clock waveform is a square wave.
Any parasitic switching transients during the rise and fall edges of the incoming clock are not part of the clock feedthrough specifications. Switching transients have frequency contents much higher than the applied clock; their amplitude strongly depends on scope probing techniques as well as grounding and power supply bypassing. The clock feedthrough, if bothersome, can be greatly reduced by adding a simple R/C lowpass network at the output of the filter pin (9). This R/C will completely eliminate any switching transients. Wideband Noise The wideband noise of the filter is the total RMS value of the device's noise spectral density and it is used to determine the operating signal-to-noise ratio. Most of its frequency contents lie within the filter's passband and cannot be reduced with post filtering. For instance, the
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LTC1164-7 wideband noise at 5V supply is 105VRMS, 95VRMS of which have frequency contents from DC up to the filter's cutoff frequency. The total wideband noise (VRMS) is nearly independent of the value of the clock. The clock feedthrough specifications are not part of the wideband noise. Speed Limitations The LT1164-7 optimizes AC performance vs power consumption. To avoid op amp slew rate limiting at maximum clock frequencies, the signal amplitude should be kept below a specified level as shown in Table 9.
Table 9. Maximum VIN vs VS and Clock
POWER SUPPLY 7.5V 5V Single 5V MAXIMUM fCLK 1MHz 1MHz 1MHz MAXIMUM VIN 2.0VRMS (fIN > 20kHz) 0.7VRMS (fIN > 250kHz) 1.4VRMS (fIN > 20kHz) 0.5VRMS (fIN > 100kHz) 0.5VRMS (fIN > 100kHz)
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Table 10. Transient Response of LTC Lowpass Filters
DELAY TIME* (SEC) 0.50/fC 0.43/fC 0.43/fC 1.15/fC 1.20/fC 1.20/fC 0.80/fC 0.85/fC 0.90/fC 0.85/fC RISE SETTLING OVERTIME** TIME*** SHOOT (SEC) (SEC) (%) 0.34/fC 0.80/fC 0.5 0.34/fC 0.85/fC 0 0.34/fC 1.15/fC 1 0.36/fC 0.39/fC 0.39/fC 0.48/fC 0.54/fC 0.54/fC 0.54/fC 2.05/fC 2.20/fC 2.20/fC 2.40/fC 4.30/fC 4.50/fC 6.50/fC 5 5 5 11 18 20 20
LOWPASS FILTER LTC1064-3 Bessel LTC1164-5 Bessel LTC1164-6 Bessel LTC1264-7 Linear Phase LTC1164-7 Linear Phase LTC1064-7 Linear Phase LTC1164-5 Butterworth LTC1164-6 Elliptic LTC1064-4 Elliptic LTC1064-1 Elliptic
* To 50% 5%, ** 10% to 90% 5%, *** To 1% 0.5%
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LTC1164-7
APPLICATI S I FOR ATIO
Transient Response
2V/DIV
INPUT = 1kHz 3V fCLK = 500kHz fC = 10kHz VS = 7.5V
100s/DIV
1164-7 F05
Figure 5
ts INPUT 90% OUTPUT
50%
td
10%
tr
RISE TIME (tr) =
1.2 TIME DELAY (td) = GROUP DELAY fCUTOFF (TO 50% OF OUTPUT)
1164-7 F06
Figure 6
Aliasing
5s/DIV
1164-7 F07
1V/DIV
0.39 5% fCUTOFF 2.2 SETTLING TIME (ts) = 5% f (TO 1% of OUTPUT) CUTOFF
Aliasing is an inherent phenomenon of sampled data systems and it occurs when input frequencies close to the sampling frequency are applied. For the LTC1164-7 case at 100:1, an input signal whose frequency is in the range of fCLK 3%, will be aliased back into the filter's passband.
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If, for instance, an LTC1164-7 operating with a 100kHz clock and 1kHz cutoff frequency receives a 98kHz 10mV input signal, a 2kHz, 143VRMS alias signal will appear at its output. When the LTC1164-7 operates with a clock-tocutoff frequency of 50:1, aliasing occurs at twice the clock frequency. Table 11 shows details.
Table 11. Aliasing (fCLK = 100kHz)
INPUT FREQUENCY (VIN = 1VRMS, fIN = fCLK fOUT) (kHz) 50:1, fCUTOFF = 2kHz 190 (or 210) 195 (or 205) 196 (or 204) 197(or 203) 198 (or 202) 199.5 (or 200.5) 100:1, fCUTOFF = 1kHz 97 (or 103) 97.5 (or 102.5) 98 (or 102) 98.5 (or 101.5) 99 (or 101) 99.5 (or 100.5) OUTPUT LEVEL (Relative to Input, 0dB = 1VRMS) (dB) -76.1 - 51.9 - 36.3 - 18.4 - 3.0 - 0.2 -74.2 - 53.2 - 36.9 - 19.6 - 5.2 - 0.7 OUTPUT FREQUENCY (Aliased Frequency fOUT = ABS [fCLK fIN]) (kHz) 10.0 5.0 4.0 3.0 2.0 0.5 3.0 2.5 2.0 1.5 1.0 0.5
VS = 7.5V fCLK = 1MHz fC = 20kHz (fCLK /fC) = 50:1
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Figure 7. Eye Diagram
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LTC1164-7
PACKAGE DESCRIPTIO U
J Package 14-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
.785 (19.939) MAX 14 13 12 11 10 9 8 .005 (0.127) MIN .025 (0.635) RAD TYP .220 - .310 (5.588 - 7.874) 1 .300 BSC (7.62 BSC) 2 3 4 5 6 7 .200 (5.080) MAX .015 - .060 (0.381 - 1.524) 0 - 15 .045 - .065 (1.143 - 1.651) NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS .014 - .026 (0.360 - 0.660) .100 (2.54) BSC .125 (3.175) MIN
J14 0801
.008 - .018 (0.203 - 0.457)
OBSOLETE PACKAGE
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LTC1164-7
PACKAGE DESCRIPTIO U
N Package 14-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
.770* (19.558) MAX 14 13 12 11 10 9 8 .255 .015* (6.477 0.381) 1 .300 - .325 (7.620 - 8.255) .130 .005 (3.302 0.127) .020 (0.508) MIN .008 - .015 (0.203 - 0.381) +.035 .325 -.015 .005 (0.127) .100 MIN (2.54) BSC 2 3 4 5 6 7 .045 - .065 (1.143 - 1.651) .065 (1.651) TYP .120 (3.048) MIN .018 .003 (0.457 0.076)
N14 1103
(
+0.889 8.255 -0.381
)
INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
NOTE: 1. DIMENSIONS ARE
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LTC1164-7
PACKAGE DESCRIPTIO U
SW Package 16-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
.050 BSC .045 .005 .398 - .413 (10.109 - 10.490) NOTE 4 16 15 14 13 12 11 10 9 N .420 MIN .325 .005 NOTE 3 .394 - .419 (10.007 - 10.643) N/2 N/2 1 .291 - .299 (7.391 - 7.595) NOTE 4 .010 - .029 x 45 (0.254 - 0.737)
0 - 8 TYP
.030 .005 TYP N
1
2
3
RECOMMENDED SOLDER PAD LAYOUT 2 3 4 5 6 7 8
.093 - .104 (2.362 - 2.642)
.037 - .045 (0.940 - 1.143)
.005 (0.127) RAD MIN
.009 - .013 (0.229 - 0.330)
NOTE 3 .016 - .050 (0.406 - 1.270)
.050 (1.270) BSC
.004 - .012 (0.102 - 0.305)
NOTE: 1. DIMENSIONS IN
.014 - .019 (0.356 - 0.482) TYP
S16 (WIDE) 0502
INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS 4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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LTC1164-7
TYPICAL APPLICATIO S
-5V 1 VIN 2 3 +5V 4 5 0.1F 6 7 LTC1164-7 14 13 12 11 10 9 8 + GND DIGITAL SUPPLY +5V 1k 1MHz CLOCK 0.1F 1N4148
RELATED PARTS
PART NUMBER LTC1064 LTC1064-1/2/3/4/7 LTC1164 LTC1164-5/6 LTC1264 LTC1264-7 LT6600-2.5 LT6600-10 DESCRIPTION Universal Filter Building Block 8th Order Low Pass Filters, FO Max = 100kHz Universal Filter Building Block 8th Order Low Pass Filters, FO Max = 20kHz Universal Filter Building Block 8th Order Low Pass Filter, FO Max = 200kHz Low Noise Differential Amp and 10MHz Lowpass Low Noise Differential Amp and 20MHz Lowpass COMMENTS Allows for Bandpass (Up to 50kHz) Using Ext Resistors Cauer, Butterworth, Bessel or Improved Bessel Allows for Bandpass (Up to 20kHz) Using Ext Resistors Butterworth, Bessel or Elliptic Allows for Bandpass (Up to 100kHz) Using Ext Resistors Flat Group Delay, High Speed Lowpass Filter 55VRMS Noise 100kHz to 10MHz 3V Supply 86VRMS Noise 100kHz to 20MHz 3V Supply
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
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VOUT
1164-7 TA03
20kHz Linear Phase Lowpass Filter
Eye Diagram
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www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 1992

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